Details

Application number :
2002322077  
Application type :
Standard  
Application status :
LAPSED  
Under opposition :
No  
Proceeding type :
 
Invention title :
Low power clock distribution methodology  
Inventor :
Magoshi, Hidetaka  
Agent name :
 
Address for service :
 
Filing date :
12 June 2002  
Associated companies :
 
Applicant name :
SONY COMPUTER ENTERTAINMENT AMERICA INC.  
Applicant address :
2-6-21 Minami-aoyama Minato-ku, Tokyo 107-062 Japan  
Old name :
 
Original Source :
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