A process flow to integrate high and low voltage peripheral transistors with a floating gate array
A Standard patent application filed on 21 October 1998 credited to Ashburn, Staton P.
;
Kaya, Cetin (NMI)
Details
Application number :
89452
Application type :
Standard
Application status :
SEALED
Under opposition :
No
Proceeding type :
Invention title :
A process flow to integrate high and low voltage peripheral transistors with a floating gate array
Inventor :
Ashburn, Staton P.
;
Kaya, Cetin (NMI)
Agent name :
Collison & Co
Address for service :
GPO Box 2556 ADELAIDE SA 5001
Filing date :
21 October 1998
Associated companies :
Applicant name :
Texas Instruments Incorporated
Applicant address :
13500 North Central Expressway Dallas, Texas, United States Of America