Three-dimensional packaging technology for multi-layered integrated circuits
A Standard patent application filed on 27 July 1998 credited to Faris, Sadeg M

Details

Application number :
85920  
Application type :
Standard  
Application status :
LAPSED  
Under opposition :
No  
Proceeding type :
 
Invention title :
Three-dimensional packaging technology for multi-layered integrated circuits  
Inventor :
Faris, Sadeg M  
Agent name :
 
Address for service :
 
Filing date :
27 July 1998  
Associated companies :
 
Applicant name :
Reveo, Inc.  
Applicant address :
 
Old name :
 
Original Source :
Go  

Same Inventor