Error detection and correction system for use with address translation memory controller
A Standard patent application filed on 12 December 1996 credited to Helbig, Walter A.

Details

Application number :

14641  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Error detection and correction system for use with address translation memory controller  

Inventor :

Helbig, Walter A.  

Agent name :

 

Address for service :

 

Filing date :

12 December 1996  

Associated companies :

 

Applicant name :

Gorca Memory Systems  

Applicant address :

 

Old name :

 

Original Source :

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