Parallel-processing system employing a horizontal architecture comprising multiple processing elements and interconnect circuit with delay memory elements to provide data paths between the processing elements
A Standard patent application filed on 30 April 1988 credited to Rau, Bantwal Ramakrishna
;
Towle, Ross Albert
;
Yen, David Wei-Luen
;
Yen, Wei-Chen
Details
Application number :
17210
Application type :
Standard
Application status :
LAPSED
Under opposition :
No
Proceeding type :
Invention title :
Parallel-processing system employing a horizontal architecture comprising multiple processing elements and interconnect circuit with delay memory elements to provide data paths between the processing elements
Inventor :
Rau, Bantwal Ramakrishna
;
Towle, Ross Albert
;
Yen, David Wei-Luen
;
Yen, Wei-Chen