Method for the verification of the polarity, presence, alignment of components and short circuits on a printed circuit board
A Standard patent application filed on 11 February 2000 credited to Feld, Michael ; Feld, Alex ; Tordjman, David

Details

Application number :

25298  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Method for the verification of the polarity, presence, alignment of components and short circuits on a printed circuit board  

Inventor :

Feld, Michael ; Feld, Alex ; Tordjman, David  

Agent name :

 

Address for service :

 

Filing date :

11 February 2000  

Associated companies :

 

Applicant name :

Original Solutions Inc.  

Applicant address :

 

Old name :

 

Original Source :

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