Structure and method of fabricating embedded vertical dram arrays with silicided bitline and polysilicon interconnect
A Standard patent application filed on 27 June 2002 credited to Radens, Carl
;
Mandelman, Jack
;
Gruening, Ulrike
;
Divakaruni, Ramachandra
;
Nesbit, Larry
Details
Application number :
2002310537
Application type :
Standard
Application status :
LAPSED
Under opposition :
No
Proceeding type :
Invention title :
Structure and method of fabricating embedded vertical dram arrays with silicided bitline and polysilicon interconnect
Inventor :
Radens, Carl
;
Mandelman, Jack
;
Gruening, Ulrike
;
Divakaruni, Ramachandra
;
Nesbit, Larry