Multiple-capture dft system for detecting or locating crossing clock-domain faults during self-test or scan test
A Standard patent application filed on 13 February 2002 credited to Chao, Hao-Jan ; Wang, Hsin-Po ; Wang, Laung-Terng ; Wen, Xiaoqing ; Hsu, Po-Ching ; Kao, Shih-Chia ; Lin, Meng-Chyi

Details

Application number :

2002243566  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Multiple-capture dft system for detecting or locating crossing clock-domain faults during self-test or scan test  

Inventor :

Chao, Hao-Jan ; Wang, Hsin-Po ; Wang, Laung-Terng ; Wen, Xiaoqing ; Hsu, Po-Ching ; Kao, Shih-Chia ; Lin, Meng-Chyi  

Agent name :

 

Address for service :

 

Filing date :

13 February 2002  

Associated companies :

 

Applicant name :

SYNTEST TECHNOLOGIES, INC.  

Applicant address :

505 S. Pastoria Avenue, Suite 101, Sunnyvale, CA 94086  

Old name :

 

Original Source :

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