Monotonic dynamic-static pseudo-nmos logic circuit and method of forming a logic gate array
A Standard patent application filed on 07 February 2002 credited to Forbes, Leonard

Details

Application number :

2002238056  

Application type :

Standard  

Application status :

LAPSED  

Under opposition :

No  

Proceeding type :

 

Invention title :

Monotonic dynamic-static pseudo-nmos logic circuit and method of forming a logic gate array  

Inventor :

Forbes, Leonard  

Agent name :

 

Address for service :

 

Filing date :

07 February 2002  

Associated companies :

 

Applicant name :

MICRON TECHNOLOGY, INC.  

Applicant address :

8000 South Federal Way, Boise, ID 83716  

Old name :

 

Original Source :

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